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54F652 - Transceivers/Registers

Download the 54F652 datasheet PDF. This datasheet also covers the 54F651 variant, as both devices belong to the same transceivers/registers family and are provided as variant models within a single manufacturer datasheet.

Description

These devices consist of bus transceiver circuits with D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logi

Features

  • Y Independent registers for A and B buses Y Multiplexed real-time and stored data Y Choice of non-inverting and inverting data paths ’F651 inverting ’F652 non-inverting Y Guaranteed 4000V minimum ESD protection Commercial 74F651SPC 74F651SC (Note 1) 74F652SPC 74F652SC (Note 1) Military 54F651SDM (Note 2) 54F651FM (Note 2) 54F651LM (Note 2) 54F652SDM (Note 2) 54F652FM (Note 2) 54F652LM (Note 2) Package Number N24C J24F M24B W24C E28A N24C J24F M24B W24C E28A Package.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (54F651-NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
54F623 OCTAL BUS TRANSCEIVERS Texas Instruments
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54F109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOP Texas Instruments
54F11 Triple 3-Input AND Gate Texas Instruments
54F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS Texas Instruments

Other Datasheets by National Semiconductor (Texas Instruments)

Part Number Description
54F651 Transceivers/Registers
54F657 Octal Bidirectional Transceiver
54F64 4-2-3-2-Input AND-OR-Invert Gate
54F646 Octal Transceiver/Register
54F648 Octal Transceiver/Register

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
54F 74F651  54F 74F652 Transceivers Registers Obsolete December 1994 54F 74F651  54F 74F652 Transceivers Registers General Description These devices consist of bus transceiver circuits with D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logic level Output Enable pins (OEAB OEBA) are provided to control the transceiver function Features Y Independent registers for A and B buses Y Multiplexed real-time and stored data Y Choice of non-inverting and inverting data paths ’F651 inverting ’F652 non-inverting Y Guaranteed 4000V minimum ESD protection Commercial 74F651SPC 74F651SC (Note 1) 74F652SPC
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