Datasheet Details
| Part number | 54LS503 |
|---|---|
| Manufacturer | National Semiconductor (now Texas Instruments) |
| File Size | 126.36 KB |
| Description | 8-Bit Successive Approximation Register |
| Download | 54LS503 Download (PDF) |
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| Part number | 54LS503 |
|---|---|
| Manufacturer | National Semiconductor (now Texas Instruments) |
| File Size | 126.36 KB |
| Description | 8-Bit Successive Approximation Register |
| Download | 54LS503 Download (PDF) |
|
|
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The ’LS503 register is basically the same as the ’LS502 except that it has an active LOW Enable (E) input that is used in cascading two or more packages for longer word lengths A HIGH signal on E after a START operation forces Q7 HIGH and prevents the device from accepting serial data With the E input of an ’LS503 connected to the CC output of a preceding (more significant) device the ’LS503 will be inhibited until the preceding device is filled causing its CC output to go LOW This LOW signal then enables the ’LS503 to accept the serial data on subsequent clocks For a description of the starting shifting and conversion operations please see the ’LS502 data sheet
DM54LS503 DM74LS503 8-Bit Successive Approximation Register (with Expansion Control) April 1992 DM54LS503 DM74LS503 8-Bit Successive Approximation Register (with Expansion Control).
| Part Number | Description |
|---|---|
| 54LS00 | Quad 2-Input NAND Gates |
| 54LS02 | Quad 2-Input NOR Gates |
| 54LS03 | Quad 2-Input NAND Gates |
| 54LS04 | Hex Inverting Gates |
| 54LS05 | HEX INVERTERS |
| 54LS08 | Quad 2-Input AND Gates |
| 54LS09 | QUAD 2-INPUT AND GATES |
| 54LS10 | Triple 3-Input NAND Gates |
| 54LS109 | Dual Positive-Edge-Triggered J-K Flip-Flops |
| 54LS11 | Triple 3-Input AND Gates |