Unit Loading Fan Out
Pin Names
I0a – I3a
I0b – I3b
S0 S1
Ea
Eb
Za
Zb
Description
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Enable Input (Active LOW)
Side B Enable Input (Active LOW)
Side A Output
Side B Output
54F 74F
UL
HIGH LOW
10 10
10 10
10 10
10 10
10 10
50 33 3
50 33 3
Input IIH IIL
Output IOH IOL
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
b1 mA 20 mA
b1 mA 20 mA
Functional Description
The ’F153 is a dual 4-input multiplexer It can select two bits
of data from up to four sources under the control of the
common Select inputs (S0 S1) The two 4-input multiplexer
circuits have individual active LOW Enables (Ea Eb) which
can be used to strobe the outputs independently When the
Enables (Ea Eb) are HIGH the corresponding outputs (Za
Zb) are forced LOW The ’F153 is the logic implementation
of a 2-pole 4-position switch where the position of the
switch is determined by the logic levels supplied to the two
Select inputs The logic equations for the outputs are as
follows
Truth Table
Select
Inputs
S0 S1
XX
LL
LL
HL
HL
LH
LH
HH
HH
H e HIGH Voltage Level
L e LOW
X e Immaterial
E
H
L
L
L
L
L
L
L
L
Inputs (a or b)
I0 I1 I2
XXX
LXX
HXX
XLX
XHX
XXL
XXH
XXX
XXX
Za e Ea(I0aS1S0 a I1aS1S0 a
I2aS1S0 a I3aS1S0)
Zb e Eb(I0bS1S0 a I1bS1S0 a
I2bS1S0 a I3bS1S0)
The ’F153 can be used to move data from a group of regis-
ters to a common output bus The particular register from
which the data came would be determined by the state of
the Select inputs A less obvious application is as a function
generator The ’F153 can generate two functions of three
variables This is useful for implementing highly irregular
random logic
Output
I3 Z
XL
XL
XH
XL
XH
XL
XH
LL
HH
2
