900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf




National Semiconductor Electronic Components Datasheet

74F378 Datasheet

Parallel D Register with Enable

No Preview Available !

January 1995
54F 74F378
Parallel D Register with Enable
General Description
The ’F378 is a 6-bit register with a buffered common En-
able This device is similar to the ’F174 but with common
Enable rather than common Master Reset
Features
Y 6-bit high-speed parallel register
Y Positive edge-triggered D-type inputs
Y Fully buffered common clock and enable inputs
Y Input clamp diodes limit high-speed termination effects
Y Full TTL and CMOS compatible
Commercial
74F378PC
74F378SC (Note 1)
74F378SJ (Note 1)
Military
54F378DM (QB)
54F378FM (QB)
54F378LM (QB)
Package
Number
N16E
J16A
M16A
M16D
W16A
E20A
Package Description
16-Lead (0 300 Wide) Molded Dual-In-Line
16-Lead Ceramic Dual-In-Line
16-Lead (0 150 Wide) Molded Small Outline JEDEC
16-Lead (0 300 Wide) Molded Small Outline EIAJ
16-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9526–1
IEEE IEC
TL F 9526 – 2
TL F 9526 – 3
TL F 9526–4
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9526
RRD-B30M75 Printed in U S A


National Semiconductor Electronic Components Datasheet

74F378 Datasheet

Parallel D Register with Enable

No Preview Available !

Unit Loading Fan Out
54F 74F
Pin Names
Description
U L Input IIH IIL
HIGH LOW Output IOH IOL
E
D0 – D5
CP
Q0 – Q5
Enable Input (Active LOW)
Data Inputs
Clock Pulse Input (Active Rising Edge)
Outputs
10 10
10 10
10 10
50 33 3
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
b1 mA 20 mA
Functional Description
The ’F378 consists of six edge-triggered D-type flip-flops
with individual D inputs and Q inputs The Clock (CP) and
Enable (E) inputs are common to all flip-flops
When the E input is LOW new data is entered into the
register on the LOW-to-HIGH transition of the CP input
When the E input is HIGH the register will retain the present
data independent of the CP input
Logic Diagram
Truth Table
Inputs
E CP Dn
HLX
L LH
LLL
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
L e LOW-to-HIGH Clock Transition
Output
Qn
No Change
H
L
TL F 9526 – 5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2


Part Number 74F378
Description Parallel D Register with Enable
Maker National Semiconductor
Total Page 8 Pages
PDF Download

74F378 Datasheet PDF

View PDF for Mobile








Similar Datasheet

1 74F37 Quad 2-input NAND buffer
Philips
2 74F37 Quad Two-Input NAND Buffer
Fairchild
3 74F373 Octal transparent latch 3-State
Philips
4 74F373 Octal Transparent Latch with 3-STATE Outputs
Fairchild
5 74F373 Octal Transparent Latch with TRI-STATE Outputs
National
6 74F373 54F373 Octal Transparent Latch with TRI-STATE(RM) Outputs (Rev. A)
ETCTI
7 74F374 Octal D-Type Flip-Flop with TRI-STATE Outputs
National Semiconductor
8 74F374 Octal D-Type Flip-Flop with 3-STATE Outputs
Fairchild
9 74F374 Octal transparent latch 3-State
Philips





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy