DM5490J Datasheet | National Semiconductor

Description Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-five for the 90A and divideby-eight for the 93A All of these counters have a gated zero reset and the 90A also has gated set-to-nine inputs for use in BCD nine’s plement applications To use their maximum count length (decade or four-bit binary) the B input is connected to the QA output The input count pulses are applied to input A and the outputs are as described in the appropriate truth table A symmetrical divide-by-ten count can be obtained from the 90A counters by connecting the QD output to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA Features Y Typical power dissipation 90A 145 m W 93A 130 m W Y Count frequency 42 MHz Connection Diagrams Dual-In-Line Package TL F 6533 - 1 Order Number DM5490J DM5490W or DM7490AN See NS Package Number J14A N14A or W14B Dual-In-Line Package Order Number DM7493AN See NS Package Number N14A TL F 6533 - 2 C1995 National Semiconductor Corporation TL F 6533 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage 7V Input Voltage 5 5V Operating Free Air Temperature Range DM54 b55 C to a125 C DM74 0 C to a70 C Storage Temperature Range b65 C to a150 C Remended Operating Conditions Symbol Parameter VCC VIH VIL IOH IOL f CLK t W t REL TA Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Current Low Level Output Current Clock...