* Y Y Y Y Y Common I O for reduced pin count Four operation modes shift left shift right parallel load and store Separate continuous inputs and outputs from Q0 and Q7 allow easy cascading Fully synchronous reset TRI-STATE outputs for bus oriented applications Connection Diagram Dual-In-Line Packag
DM74LS323 Datasheet (152.06 KB)
DM74LS323
National Semiconductor
152.06 KB
8-bit universal shift storage register.
DM54LS323 DM74LS323 8-Bit Universal Shift Storage Register with Synchronous Reset and Common I O Pins April 1992 DM54LS323 DM74LS323 8-Bit Universal.
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