* Y Y Y Y Y Y Y Y Y Registers are edge-triggered by the positive transition of the clock All inputs are PNP transistors Input disable dominates over output disable Output high impedance state does not impede any other mode of operation 8-bit I O pins are TRI-STATE buffers Typical shift frequency is
DM74LS952 Datasheet (276.33 KB)
DM74LS952
National Semiconductor
276.33 KB
Dual rank 8-bit tri-state?shift register.
www.DataSheet4U.com DM74LS952 (DM86LS52) Dual Rank 8-Bit TRI-STATE Shift Register August 1991 DM74LS952 (DM86LS52) Dual Rank 8-Bit TRI-STATE Shift .
📁 Related Datasheet
DM74LS95B 4-BIR RIGHT/LEFT SHIFT REGISTER (National Semiconductor)
DM74LS90 Decade and Binary Counters (National)
DM74LS90 Decade and Binary Counters (Fairchild Semiconductor)
DM74LS90M Decade and Binary Counters (Fairchild Semiconductor)
DM74LS90M Decade and Binary Counters (National Semiconductor)
DM74LS90N Decade and Binary Counters (National Semiconductor)
DM74LS90N Decade and Binary Counters (Fairchild Semiconductor)
DM74LS93 Decade and Binary Counters (National)
DM74LS93 Decade and Binary Counters (Fairchild Semiconductor)
DM74LS93M Decade and Binary Counters (National Semiconductor)
