DM8837 Datasheet | National Semiconductor

Line Drivers/Receivers DM7837/DM8837 hex unified bus receiver general description The DM7837/DM8837 are high speed receivers designed for use in bus organized data transmission systems Interconnected by terminated 120n Impedance lines. The external termination is intended to be 180[2 reSIStor from the bus to the +5V logic supply together with a 390[2 resistor from the bus to ground. The receiver design employs a built-in Input hysteresIs providing substantial nOise Immunity. Low input current allows up to 27 driver/receiver pairs to utilize a mon bus. Disable Inputs provide time discriminatIOn. Disable Inputs and receiver outputs are DTL/TTL patible. Performance is optimized for systems with bus rISe and fall times::::: lOllS. Features - Low receiver Input current for normal V cc or Vee = OV (1511A typ) - Six separate receivers per package - Built-in receiver input hysteresis (lV typ) - High receiver nOise immunity (2V typ) - Temperature insensitive receiver Input...