Description
The DS7640 and DS8640 are quad 2-input receivers designed for use in bus organized data transmission systems interconnected by terminated 120X impedance lines The external termination is intended to be 180X resistor from the bus to the a5V logic supply together with a 390X resistor from the bus to ground The design employs a built-in input threshold providing substantial noise immunity Low input current allows up to 27 driver receiver pairs to utilize a common bus
Features
- Y Low input current with normal VCC or VCC e 0V (30 mA typ)
Y High noise immunity (1 1V typ)
Y Temperature-insensitive input thresholds track bus logic levels
Y TTL compatible output
Y Matched optimized noise immunity for ‘‘1’’ and ‘‘0’’ levels
Y High speed (19 ns typ)
Connection Diagram
Dual-In-Line Package
Typical.