DS90UR124 serializer/deserializer equivalent, dc-balanced 24-bit lvds serializer/deserializer.
pre-emphasis to boost signals over longer distances using lossy cables. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects. Using National.
n LOCK output flag to ensure data integrity at Receiver side n Balanced TSETUP/THOLD between RCLK and RDATA on Receiver .
The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by eliminati.
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