DS99R105 Key Features
- Internal DC Balancing encode/decode
- Supports AC
- 3 MHz-40 MHz clock embedded and DC-Balancing 24:1
- Capable to drive shielded twisted-pair cable
- User selectable clock edge for parallel data on both
- Part: DS99R105
- Manufacturer: National Semiconductor
- Size: 959.92 KB
Other DS99R105 Datasheets
| Manufacturer | Part Number | Description |
|---|---|---|
Texas Instruments |
DS99R105 | 3-40MHz DC-Balanced 24-Bit LVDS Serializer / Deserializer |
DS99R105 Description
The DS99R105/DS99R106 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. It saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector...