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LM832 Datasheet

LM832 Dynamic Noise Reduction System DNR

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LM832 Dynamic Noise Reduction System DNR
August 1989
General Description
The LM832 is a stereo noise reduction circuit for use with
audio playback systems The DNR system is noncomple-
mentary meaning it does not require encoded source mate-
rial The system is compatible with virtually all prerecorded
tapes and FM broadcasts Psychoacoustic masking and an
adaptive bandwidth scheme allow the DNR to achieve 10
dB of noise reduction DNR can save circuit board space
and cost because of the few additional components re-
quired
The LM832 is optimized for low voltage operation with input
levels around 30 mVrms
For higher input levels use the LM1894
DNR is a registered trademark of National Semiconductor Corporation
The DNR system is licensed to National Semiconductor Corp under U S patent 3 678 416
and 3 753 159
A trademark and licensing agreement is required for the use of this product
Features
Y Low voltage battery operation
Y Non-complementary noise reduction ‘‘single ended’’
Y Low cost external components no critical matching
Y Compatible with all prerecorded tapes and FM
Y 10 dB effective tape noise reduction CCIR ARM
weighted
Y Wide supply range 1 5V to 9V
Y 150 mVrms input overload
Y No royalty requirements
Y Cascade connection for 17 dB noise reduction
Applications
Y Headphone stereo
Y Microcassette players
Y Radio cassette players
Y Automotive radio tape players
Application Circuit
Order Number LM832M See NS Package M14A
Order Number LM832N See NS Package N14A
FIGURE 1 Component Hook-up for Stereo DNR System
C1995 National Semiconductor Corporation TL H 5176
TL H 5176 – 1
RRD-B30M115 Printed in U S A


National Semiconductor Electronic Components Datasheet

LM832 Datasheet

LM832 Dynamic Noise Reduction System DNR

No Preview Available !

Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
10V
Power Dissipation (Note 1)
1 2W
Input Voltage
1 7 Vpp
Storage Temperature
b65 to a150 C
Operating Temperature (Note 1)
b40 to a85
Soldering Information
Y Dual-In-Line Package
Soldering (10 seconds)
260 C
Y Small Outline Package
Vapor Phase (60 seconds)
215 C
Infrared (15 seconds)
220 C
See AN-450 ‘‘Surface Mounting Methods and Their Effects
on Products Reliability’’ for other methods of soldering sur-
face mount devices ’’
DC Electrical Characteristics TA e 25 C VCC e 3 0V
Symbol
Parameter
Conditions
Min Typ Max Units
VOP
Operating Voltage
Supply Voltage for Normal Operation
15 30 90
ICC(1)
Supply Current (1)
Pin 9 to GND 0 1 mF BWeMin Note 2
25 40
ICC(2)
Supply Current (2)
DC GND Pin 9 with 2k BWeMax Note 2
50 80
VIN(1)
Input Voltage (1)
Pin 2 Pin 13
0 20 0 36
05
VIN(2)
Input Voltage (2)
Pin 6
0 50 0 65
08
VIN(3)
Input Voltage (3)
Pin 9
0 50 0 65
08
VOUT(1)
Output Voltage (1)
Pin 4 Pin 11
0 20 0 35 0 50
VOUT(2)
Output Voltage (2)
Pin 5 Stereo Mode
0 15 0 28 0 40
VOUT(3)
Output Voltage (3)
Pin 5 Monaural Mode DC Ground Pin 14
0 10 0 20 0 30
VOUT(4)
Output Voltage (4)
Pin 8
0 25 0 40 0 60
VOUT(5)
Output Voltage (5)
Pin 10 BWeMax Note 2
1 00 1 27 1 50
VOUT(6)
Output Voltage (6)
Pin 10 BWeMin Note 2
0 50 0 65 0 75
VOS
Output DC Shift
Pin 4 PIN 11 Change BW Min to Max
10 30
V
mA
mA
V
V
V
V
V
V
V
V
V
mV
AC Electrical Characteristics
Symbol
Parameter
Conditions
Min Typ Max Units
MAIN SIGNAL PATH (Note 3)
AV
CB
fMIN
fMAX
THD
MVIN
SN
Voltage Gain
Channel Balance
Min Bandwidth
Max Bandwidth
Distortion
Max Input Voltage
Signal to Noise
VINe 30 mVrms fe1 kHz BWeMax Note 2
VINe 30 mVrms fe1 kHz BWeMax Note 2
0 1 mF between Pin 9 - GND
DC Ground Pin 9 with 2k
VINe30 mVrms fe1 kHz BWeMax Note 2
THDe3% fe1 kHz BWeMax Note 2
REFe30 mVrms BWeMax CCIR ARM
b1 0
b1 0
600
24
120
60
00
0
1000
30
0 07
150
68
a1 0
a1 0
1500
46
05
dB
dB
Hz
kHz
%
mVrms
dB
ZIN Input Impedance Pin 2 Pin 13
14 20 26
kX
CS
Channel Separation
Refe30 mVrms fe1 kHz BWeMax Note 2
40
68
dB
PSRR
PSRR
CONTROL PATH
VRIPPLEe50 mVrms fe100 Hz
40 55
dB
AVsum(1)
AVsum(2)
AV 1st
ZIN 1st
AVPKD
ZINPKD
VRPKD
Summing Amp Gain (1)
Summing Amp Gain (2)
Gain Amp Gain
Input Impedance
Peak Detector Gain
Input Impedance
Output DC Change
VINe30 mVrms at R and L fe1 kHz
DC Ground Pin 14 fe1 kHz
Pin 6 to Pin 8
Pin 6
AC In DC Out Pin 9 to Pin 10
Pin 9
Pin 10 Change BW Min to Max
b3 0
b9 0
25
28
25
500
05
b1 5
b6 0
30
40
30
800
0 62
00
b3 0
35
52
35
1100
08
dB
dB
dB
kX
VV
X
V
Note 1 For operation in ambient temperature above 25 C the device must be derated based on a 150 C maximum junction temperature and a thermal resistance
junction to ambient as follows LM832N b90 c w LM832M-115 c w
Note 2 To force the DNR system into maximum bandwidth connect a 2k resistor from pin 9 to GND AC ground pin 9 or pin 6 to select minimum bandwidth To
change minimum and maximum bandwidth see Application Hints
Note 3 The maximum noise reduction CCIR ARM weighted is about 14 dB This is accomplished by changing the bandwidth from maximum to minimum In actual
operation minimum bandwidth is not selected a nominal minimum bandwidth of about 2 kHz gives 10 dB of noise reduction See Application Hints
2


Part Number LM832
Description LM832 Dynamic Noise Reduction System DNR
Maker National Semiconductor
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LM832 Datasheet PDF






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