Description
The LMK01000/LMK01010/LMK01020 family provides an easy way to divide and distribute high performance clock signals throughout the system..
Features
- two programmable clock inputs (CLKin0 and CLKin1) that allow the user to dynamically switch between different clock domains. Each device features 8 clock outputs with independently programmable dividers and delay adjustments. The outputs of the device can be easily synchronized by an external pin (SYNC.
- ). Features.
- 30 fs additive jitter (100 Hz to 20 MHz).
- Dual clock inputs.
- Programmable output channels (0 to 1600 MHz).
- LMK01000: 3 LVDS outp.