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MH0009C - dc coupled two phase MOS clock driver

Download the MH0009C datasheet PDF. This datasheet also covers the MH0009 variant, as both devices belong to the same dc coupled two phase mos clock driver family and are provided as variant models within a single manufacturer datasheet.

Description

The MH0009/MH0009C is high speed, DC coupled, dual MOS clock driver designed to operate In conjunction with high speed line drivers such as the DM8830, DM7440, or DM7093.

Features

  • DC logically controlled operation.
  • Output Swings - to 30V.
  • Ouiput Currents - In excess of ±500 mA.
  • l-ligl1 rep rate - In excess of 2 MHz.
  • Low standby power schematic and connection diagrams ¢,BIAS 3 2 ¢,INPUT A . - - 1 " ' - _ 1 2 9, OUTPUT 12- Lead TO-S Package oP,INPUT A - - f1fJ, INPUT 8 4 - - -- v- 5----~--t -~-I1V.
  • ¢zINPUT8 6 ---+-~--[.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MH0009-NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by National Semiconductor (Texas Instruments)

Part Number Description
MH0009 dc coupled two phase MOS clock driver
MH0007 dc coupled MOS clock driver
MH0007C dc coupled MOS clock driver
MH0012 high speed MOS clock driver
MH0012C high speed MOS clock driver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
M emo.ryI Clock 0 rivers MH0009/MH0009C dc coupled two phase MOS clock driver general description The MH0009/MH0009C is high speed, DC coupled, dual MOS clock driver designed to operate In conjunction with high speed line drivers such as the DM8830, DM7440, or DM7093. The transition from TTLlDTL to MOS logic level IS accomplished by PNP input transistors which also assure accurate control of the output pulse width. features • DC logically controlled operation • Output Swings - to 30V • Ouiput Currents - In excess of ±500 mA • l-ligl1 rep rate - In excess of 2 MHz • Low standby power schematic and connection diagrams ¢,BIAS 3 2 ¢,INPUT A . - - 1 " ' - _ 1 2 9, OUTPUT 12- Lead TO-S Package oP,INPUT A - - f1fJ, INPUT 8 4 - - -.......- ....... v- 5---....-~--t .......
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