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MM54HC174 - Hex D Flip-Flops

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Description

These edge triggered flip-flops utilize advanced silicon-gate CMOS technology to implement D-type flip-flops They possess high noise immunity low power and speeds comparable to low power Schottky TTL circuits This device contains 6 master-slave flip-flops with a common clock and common clear Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input The CLEAR input when low sets all outputs to a low state Each out

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Other Datasheets by National Semiconductor
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