Description
This high speed shift register utilizes advanced silicon-gate CMOS technology This device possesses the high noise immunity and low power consumption of standard CMOS integrated circuits as well as the ability to drive 15 LS-TTL loads This device contains an 8-bit serial-in parallel-out shift register that feeds an 8-bit D-type storage register The storage register has 8 TRI-STATE outputs Separate clocks are provided for both the shift register and the storage register The shift register has a direct-overriding clear serial input and serial output (standard) pins for cascading Both the shift register and storage register use positive-edge triggered clocks If both clocks are connected together the shift register state will always be one clock pulse ahead of the storage register The 54HC 74HC logic family is speed function and pin-out patible with the standard 54LS 74LS logic family All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground Connection Diagram.
Key Features
- Y Low quiescent current 80 mA maximum (74HC Series) Y Low input current 1 mA maximum Y 8-bit serial-in parallel-out shift register
