Description
The PCI-IDE Interface Controller is designed to interface the IDE drive directly onto the PCI bus It provides write posting and read pre-fetches allowing the CPU to run concurrently with IDE cycles It connects IDE drIves ‘‘gluelessly’’ into the PCI bus and supports faster ATA devices using modes 1 2 and 3 through PIO accesses It supports dual IDE channels for up to four drives and works seamlessly with the National Semiconductor’s SuperI OTM family of products A full suite of software drives inc
Features
- Y Y Y Y
Fully compatible with PCI specifications rev 2 0 (April 1993) Programmable Base Address registers Interfaces with the 32 bits PCI local bus to IDE drives Support IDE PIO timing mode 0 1 2 of ANSI ATA specifications
Y Y Y
Support Mode 3 (11 MB s) timing proposal on enhanced IDE (IDE-2 or ATA-2) specifications Two IDE-2 channel supported (each channel supports 2 devices) Supports primary IDE or secondary IDE address 16-Byte FIFO provide 4-level Posted Write and Read ahead buffers per ch.