Datasheet Summary
128-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface
Features
SPI-patible serial bus interface
108 MHz (maximum) clock frequency
2.7 V to 3.6 V single supply voltage
Supports legacy SPI protocol and new Quad I/O or Dual I/O SPI protocol
Quad/Dual I/O instructions resulting in an equivalent clock frequency up to 432 MHz:
XIP mode for all three protocols
- Configurable via volatile or non-volatile registers: enables XiP mode directly after power on
Program/Erase suspend instructions
Continuous read (entire memory) via single instruction:
- Fast Read
- Quad or Dual Output Fast Read
- Quad or Dual I/O...
