HC126A Description
The device inputs are patible with standard CMOS outputs; with pullup resistors, they are patible with LSTTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3−state memory address drivers, clock drivers, and other bus−oriented systems.
HC126A Key Features
- Output Drive Capability: 15 LSTTL Loads
- Outputs Directly Interface to CMOS, NMOS, and TTL
- Operating Voltage Range: 2.0 to 6.0 V
- Low Input Current: 1.0 mA
- High Noise Immunity Characteristic of CMOS Devices
- In pliance with the JEDEC Standard No. 7 A Requirements
- Chip plexity: 72 FETs or 18 Equivalent Gates
- NLV Prefix for Automotive and Other