900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf




  ON Semiconductor Electronic Components Datasheet  

MC100LVEL11 Datasheet

Low Voltage 1:2 Differential Fanout Buffer

No Preview Available !

MC100LVEL11
3.3V ECL 1:2
Differential Fanout Buffer
Description
The MC100LVEL11 is a differential 1:2 fanout buffer. The device is
functionally similar to the E111 device but with higher performance
capabilities. Having within-device skews and output transition times
significantly improved over the E111, the LVEL11 is ideally suited for
those applications which require the ultimate in AC performance.
The differential inputs of the LVEL11 employ clamping circuitry to
maintain stability under open input conditions. If the inputs are left
open (pulled to VEE) the Q outputs will go LOW.
Features
330 ps Propagation Delay
5 ps Skew Between Outputs
High Bandwidth Output Transitions
The 100 Series Contains Temperature Compensation
PECL Mode Operating Range: VCC = 3.0 V to 3.8 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = −3.0 V to −3.8 V
Internal Input Pulldown Resistors on D,
Pullup and Pulldown Resistors on D
Q Output will Default LOW with Inputs Open or at VEE
These Devices are Pb−Free and are RoHS Compliant
Q0 1
Q0 2
8 VCC
7D
Q1 3
6D
Q1 4
5 VEE
Figure 1. Logic Diagram and Pinout Assignment
www.onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
8
1
TSSOP−8
DT SUFFIX
CASE 948R
MARKING
DIAGRAMS*
8
KVL11
ALYW
G
1
8
KV11
ALYWG
G
1
1
DFN8
MN SUFFIX
CASE 506AA
1
3ZMG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
January, 2015 − Rev. 13
1
Publication Order Number:
MC100LVEL11/D


  ON Semiconductor Electronic Components Datasheet  

MC100LVEL11 Datasheet

Low Voltage 1:2 Differential Fanout Buffer

No Preview Available !

MC100LVEL11
Table 1. PIN DESCRIPTION
Pin
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁQ0, Q0; Q1, Q1
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁD, D
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁVCC
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁVEE
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁEP
Function
ECL Data Outputs
ECL Data Inputs
Positive Supply
Negative Supply
(DFN8 only) Thermal exposed pad must be connected to a suffi-
cient thermal conduit. Electrically connect to the most negative
supply (GND) or leave unconnected, floating open.
Table 2. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
75 kW
ESD Protection
Human Body Model
Machine Model
Charge Device Model
> 4 KV
> 400 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SOIC−8
TSSOP−8
DFN8
Level 1
Level 3
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Transistor Count
63
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Units
VCC PECL Mode Power Supply
VEE NECL Mode Power Supply
VI PECL Mode Input Voltage
NECL Mode Input Voltage
Iout Output Current
VEE = 0 V
VCC = 0 V
VEE = 0 V
VCC = 0 V
Continuous
Surge
VI  VCC
VI  VEE
8 to 0
−8 to 0
6 to 0
−6 to 0
50
100
V
V
V
mA
mA
TA Operating Temperature Range
Tstg Storage Temperature Range
qJA Thermal Resistance (Junction−to−Ambient) 0 lpfm
500 lpfm
SOIC−8
SOIC−8
−40 to +95
−65 to +150
190
130
°C
°C
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
SOIC−8
qJA Thermal Resistance (Junction−to−Ambient) 0 lpfm
500 lpfm
TSSOP−8
TSSOP−8
41 to 44 ± 5%
185
140
°C/W
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
TSSOP−8
qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
DFN8
DFN8
41 to 44 ± 5%
129
84
°C/W
°C/W
°C/W
Tsol Wave Solder
Pb−Free <2 to 3 sec @ 260°C
265 °C
qJC
Thermal Resistance (Junction−to−Case)
(Note 2)
DFN8
35 to 40
°C/W
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
www.onsemi.com
2


Part Number MC100LVEL11
Description Low Voltage 1:2 Differential Fanout Buffer
Maker ON Semiconductor
PDF Download

MC100LVEL11 Datasheet PDF






Similar Datasheet

1 MC100LVEL11 Low Voltage 1:2 Differential Fanout Buffer
Motorola
2 MC100LVEL11 Low Voltage 1:2 Differential Fanout Buffer
ON Semiconductor
3 MC100LVEL12 Low Impedance Driver
Motorola
4 MC100LVEL12 Low Impedance Driver
ON Semiconductor
5 MC100LVEL13 Dual 1:3 Fanout Buffer
Motorola
6 MC100LVEL13 Dual 1:3 Fanout Buffer
ON Semiconductor
7 MC100LVEL14 1:5 Clock Distribution Chip
Motorola
8 MC100LVEL14 1:5 Clock Distribution Chip
ON Semiconductor
9 MC100LVEL16 Differential Receiver
Motorola





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z



Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy