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MC74HC73A
Dual J-K Flip-Flop with Reset
High−Performance Silicon−Gate CMOS
The MC74HC73A is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
Each flip−flop is negative−edge clocked and has an active−low asynchronous reset.
The MC74HC73A is identical in function to the HC107, but has a different pinout.
Features
• Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 mA • High Noise Immunity Characteristic of CMOS Devices • In Compliance with the JEDEC Standard No. 7.
MC74HC73A Datasheet
