MM74HC175 Datasheet | onsemi

Description The MM74HC175 high speed D- type flip- flop with plementary outputs utilizes advanced silicon- gate CMOS technology to achieve the high noise immunity and low power consumption of standard CMOS integrated circuits, along with the ability to drive 10 LS- TTL loads. Information at the D inputs of the MM74HC175 is transferred to the Q and Q outputs on the positive going edge of the clock pulse. Both true and plement outputs from each flip flop are externally available. All four flip- flops are controlled by a mon clock and a mon CLEAR. Clearing is acplished by a negative pulse at the CLEAR input. All four Q outputs are cleared to a logical “0” and all four Q outputs to a logical “1.” The 74HC logic family is functionally as well as pin- out patible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground. Features - Typical Propagation Delay: 15 ns - Wide Operating Supply Voltage Range: 2- 6 V - Low Input Current: 1 m A Maximum - Low Quiescent Supply Current: 160 m A Maximum (74HC) - High Output Drive Current: 4 m A Minimum (74HC) - These are Pb- Free Devices DATA SHEET .onsemi. SOIC- 16 CASE 751B TSSOP- 16 CASE 948F MARKING DIAGRAMS HC175A AWLYWW HC 175A ALYW HC175A = Specific Device Code = Assembly Location L/WL = Wafer Lot Y/YY = Year of Production, Last Number W/WW = Work Week Number CONNECTION DIAGRAM Figure 1. Logic Diagram © Semiconductor ponents Industries, LLC, 1999 November, 2022 - Rev. 1 (Top View) Clear L H H H TRUTH TABLE (Each Flip Flop) Inputs Clock ↑...