NLSF1174 Overview
NLSF1174 Hex D Flip−Flop with mon Clock and Reset This device consists of six D flip−flops with mon Clock and Reset inputs. Each flip−flop is loaded with a low−to−high transition of the Clock input. Reset is asynchronous and active low.
NLSF1174 Key Features
- Output Drive patibility: 10 LSTTL Loads Outputs Directly Interface to CMOS Operating Voltage Range: 2.0 to 6.0 V Low Inp
- For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering
- Rev. 5