NLSX3373 Datasheet | onsemi

ttp://onsemi. MARKING DIAGRAM 8 1 UDFN8 MU SUFFIX CASE 517AJ VBM G - Wide High- Side VCC Operating Range: 1.65 V to 4.5 V - High- Speed with 20 Mb/s Guaranteed Date Rate for VL > 2.5 V - Low Bit- to- Bit Skew - Enable Input and I/O Lines have Overvoltage Tolerant (OVT) to - - - - 4.5 V Nonpreferential Powerup Sequencing Integrated 10 k W Pullup Resistors Small Space Saving Package - 1.8 x 1.2 x 0.5 mm UDFN8 This is a Pb- Free Device Wide Low- Side VL Operating Range: 1.2 V to 4.1 V VB = Specific Device Code M = Date Code G = Pb- Free Package LOGIC DIAGRAM EN VL VCC GND I/O VL1 I/O VCC1 I/O VL2 I/O VCC2 Typical Applications - I2C, SMBus, PMBus - Low Voltage ASIC Level Translation - Mobile Phones, PDAs, Cameras Important Information PIN ASSIGNMENT VL I/O VL1 I/O VL2 GND 1 2 3 4 (Top View) 8 7 6 5 VCC I/O VCC1 I/O VCC2 EN - ESD Protection for Power, Enable and I/O Pins: Human Body Model (HBM): $7.5 k V Machine Model (MM): 400 V ORDERING INFORMATION Device NLSX3373MUTAG Package Shipping† UDFN8 3000/T ape & Reel (Pb- Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor ponents Industries, LLC,...