PM7388 Description
Preliminary PM7388 FREEDM 336A1024 Frame Engine and Datalink Manager.
PM7388 Key Features
- Single-chip multi-channel packet processor supporting line rate throughput transfers of packet sizes from 40 to 9.6 Kbyt
- Provides simultaneous support of PPP, Frame Relay, Multilink-PPP and Multilink-Frame Relay protocols. Alternative protoc
- Supports up to 168 multilink bundles with up to 12 member links per bundle. These bundles are posed of independent HDLC
- Support for up to 100 ms of intra bundle skew in the receive direction when supporting the minimum. fragment size
- Support for PPP header pression as per RFC 1661
- Link Control protocol packets are identified by the PID as control protocols and will be forwarded to the Any-PHY interf
- Link layer address lookup can be performed based on HDLC channel and 10 bit DLCI for HDLC channels supporting Frame Rela
- The lookup algorithm can support a maximum of 16 K connection identifiers (CIs) amongst multilink FR bundles. The connec
- Control frames are identified and forwarded to Any-PHY interface
- 12 bit sequence numbers supported