* Built-in dividing-by-two circuit for horizontal synchronizing signal
* Built-in dividing-by-two circuit for vertical synchronizing signal
* On/off switch fu.

* CRT monitors SSIP013-P-0000 s Block Diagram 0 V to 5 V 4 10 5 13 1 VCC 1.1±0.25 Gain control SW 11 Out-.

Pin No. 1 2 3 4 5 6 7 Description Power supply 12 V(VCC) Freq.-divided output1 output Freq.-divided output2 on/off Freq.-divided output2 control input Freq.-divided output1 control input V-sync. input GND1 Pin No. 8 9 10 11 12 13 H-sync. input Freq..

AN5760

AN5763

AN5764

AN5764N

AN5765

AN5766

AN5767

AN5767K

AN5769

AN5707NS

AN5710

AN5715

AN5720