PE42510A Datasheet | pSemi

Description The following specification defines an SPDT (single pole double throw) switch for use in cellular and other wireless applications. The PE42510A uses Peregrine’s Ultra CMOS™ process and it also features Ha RP™ technology enhancements to deliver high linearity and exceptional harmonics performance. Ha RP™ technology is an innovative feature of the Ultra CMOS™ process providing upgraded linearity performance. The PE42510A is manufactured on Peregrine’s Ultra CMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of Ga As with the economy and integration of conventional CMOS. Figure 1. Functional Diagram SPDT High Power Ultra CMOS™ RF Switch 30 - 2000 MHz Features - No blocking capacitors required - 50 Watt P1d B pression point - 10 Watts <8:1 VSWR (Normal Operation) - 29 d B Isolation @800 MHz - < 0.3 d B Insertion Loss at 800 MHz - 2fo and 3fo < -84 d Bc @ 42.5 d Bm - ESD rugged to 2.0 k V HBM - 32-lead 5x5 mm QFN package Figure 2. Package Type 32-lead 5x5 mm QFN RF1 RF2 CMOS Control Driver and ESD CTRL .. Table 1. Electrical Specifications @ 25 °C, VDD = 3.3 V (ZS = ZL = 50 Ω) unless otherwise noted Parameter RF Insertion Loss 0.1 d B Input pression Point Isolation (Supply Biased): RF to RFC Unbiased Isolation: RF - RFC, VDD, V1=0 V RF (Active Port) Return Loss 2nd Harmonic 3rd Harmonic Switching Time Lifetime switch cycles 800 MHz @ +42.5 d Bm 50% of CTRL to 10/90% of RF No RF applied 30 MHz ≤ 1 GHz 1 GHz < 2 GHz 800 MHz, 50% duty cycle 800 MHz 27 d Bm, 800 MHz 25 5 15 22 -84 0.04 10^10 -81 0.5 Conditions Min Typ 0.4 0.5 45.4 29 Max 0.6 0.7 Units d B d B d Bm d B d B d B d Bc ms cycles Note: The device was matched with 1.6 n H inductance per RF port Document No. 70-0266-01 │ .psemi. ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 7 Product Specification Figure 3. Pin Configuration (Top View) GND GND GND GND GND GND GND RFC 32 31 30 29 28 27 26 25 Table 3....