PI6C49S1504
Features
ÎÎ4 differential outputs with 2 banks ÎÎUser configurable output signaling standard for each bank:
LVDS or LVPECL or HCSL ÎÎLVCMOS reference output up to 200MHz ÎÎUp to 1.5GHz output frequency for differential outputs ÎÎUltra low additive phase jitter: < 0.03 ps (typ) (differential
156.25MHz, 12KHz to 20MHz integration range) ÎÎSelectable reference inputs support either single-ended or differential or Xtal ÎÎLow skew between outputs within banks (<40ps) ÎÎLow delay from input to output (Tpd typ. < 1.5ns) ÎÎSeparate Input output supply voltage for level shifting ÎÎ2.5V / 3.3V power supply ÎÎIndustrial temperature support ÎÎTSSOP-28 package
Description
The PI6C49S1504 is a high performance fanout buffer devicewhich supports up to 1.5GHz frequency. The device also uses Peri's proprietary input detection technique to make sure illegal input conditions will be detected and reflected by output states. This device is ideal for systems that need to distribute low jitter clock...
