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PI6LC4830 - Network Clock Generator

General Description

The PI6LC4830 is an LC VCO based low phase noise design intended for the most demanding PCIe® 2.0 applications.

Use of the ultra-low noise LC VCO allows for much greater noise margins than traditional solutions.

This is ideal for noisy environments.

Key Features

  • ÎÎ3.3V supply voltage ÎÎ3 HCSL and 1 LVCMOS 100MHz outputs with OE/ function ÎÎ1 LVCMOS 100/50MHz selectable ÎÎ25MHz crystal or differential input ÎÎLow 1ps RMS max integrated phase noise design ÎÎPLL Bypass mode for test ÎÎ32 lead 5x5mm TQFN package.

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Full PDF Text Transcription for PI6LC4830 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for PI6LC4830. For precise diagrams, and layout, please refer to the original PDF.

PI6LC4830 HiFlexTM Network Clock Generator Features ÎÎ3.3V supply voltage ÎÎ3 HCSL and 1 LVCMOS 100MHz outputs with OE/ function ÎÎ1 LVCMOS 100/50MHz selectable ÎÎ25MHz c...

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Hz outputs with OE/ function ÎÎ1 LVCMOS 100/50MHz selectable ÎÎ25MHz crystal or differential input ÎÎLow 1ps RMS max integrated phase noise design ÎÎPLL Bypass mode for test ÎÎ32 lead 5x5mm TQFN package Description The PI6LC4830 is an LC VCO based low phase noise design intended for the most demanding PCIe® 2.0 applications. Use of the ultra-low noise LC VCO allows for much greater noise margins than traditional solutions. This is ideal for noisy environments.