74F256 latch equivalent, dual addressable latch.
* Combines dual demultiplexer and 8-bit latch
* Serial-to-parallel capability
* Output from each storage bit available
* Random (addressable) data entry .
The 74F256 dual addressable latch has four distinct modes of operation which are selectable by controlling the Master Reset (MR) and Enable (E) inputs (see Function Table). In the addressable latch mode, data at the Data inputs is written into the ad.
Image gallery
TAGS
Download (Size : 104.13KB)