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74F824 - Bus interface registers

General Description

The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity.

The 74F821/74F822 are buffered 10-bit wide versions of the popular 74F374/74F534 functions.

The 74F822 is the inverted output version of 74F821.

Overview

INTEGRATED CIRCUITS 74F821/822/823/824/825/826 Bus interface registers Product specification IC15 Data Handbook 1996 Jan 05 Philips Semiconductors Philips Semiconductors Product specification Bus interface registers.

Key Features

  • flip-flops.
  • High speed parallel registers with positive edge-triggered D-type.
  • High performance bus interface buffering for wide data/address paths or busses carrying parity.
  • High impedance PNP base inputs for reduced loading (20µA in high and low states).
  • IIL is 20µA vs 1000µA for AM29821 series.
  • Buffered control inputs to reduce AC effects.
  • Ideal where high speed, light loading, or increased fan-in as required with MOS microprocessor.