74HC112 Datasheet - Philips

Dual JK flip-flop

74HC112 General Description

The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT112 are dual negative-edge triggered JK-type flip-flops featuring individual nJ, nK, clock (nCP), set (nSD) and res.

74HC112 Datasheet (106.77 KB)

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74HC112

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Philips

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106.77 KB

Description:

Dual jk flip-flop.
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

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74HC112 Dual flip-flop Philips

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74HC112 General Description

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