P87CL883 Description
ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION Special Function Registers (SFRs) I/O facilities Ports Port I/O configuration Alternative Port Function Register (ALTP) Timer/event counters Timer T2 Timer/Counter 2 Control Register (T2CON) MSK modem Watchdog Timer OTP programming OTP programming by a programmer In-System Programming mode Oscillator circuitry...
P87CL883 Applications
- Full static 80C51 CPU; enhanced 8-bit architecture with
- Minimum 6 cycles per instruction (twice as fast as a standard 80C51 core)