SAA7715H
FEATURES
Hardware Possible firmware
APPLICATIONS
GENERAL DESCRIPTION
QUICK REFERENCE DATA
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
PLL division factors for different clock inputs The word select PLL The Filter Stream DAC (FSDAC) Interpolation filter Noise shaper Function of pin POM Power off plop suppression Pin VREFDA for internal reference Supply of the analog outputs External control pins Digital serial inputs/outputs and SPDIF inputs Digital serial inputs/outputs SPDIF inputs I2C-bus interface (pins SCL and SDA) Reset Power-down mode Power supply connection and EMC Test mode connections (pins TSCAN, RTCB and SHTCB)
I2C-BUS PROTOCOL
Addressing Slave address (pin A0) Write cycles Read cycles Program RAM Data word alignment I2C-bus memory map specification I2C-bus memory map definition Table definitions
10.1 10.1.1 10.2 10.2.1 10.3 10.3.1 10.3.2 10.3.3 10.3.4 10.3.5 10.3.6 10.3.7 10.4 10.4.1 10.4.2 10.4.3 10.4.4
18.2 18.3 18.4...
