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MJ1472 Datasheet PCM RECEIVING

Manufacturer: Plessey

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Datasheet Details

Part number MJ1472
Manufacturer Plessey
File Size 101.75 KB
Description PCM RECEIVING
Datasheet download datasheet MJ1472 Datasheet

Overview

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MJ1472 A_DV_A_N_C_E_IN_F_OR_M_A_T_IO_N Advance information is issued to advise Customers of new additions to the Plessey Semiconductors range which, nevertheless, still have 'pre-production' status.

Details given may, therefore, change without notice although we would expect this performance data to be representative of 'full production' status product in most cases.

Key Features

  • Line Time Generation (From 9 Stage Clock Driven Counter).
  • Line Timing, Frame Alignment.
  • Alarm Signals FAT + MIR, ATL, AW, EPAT.
  • Test Points TP1, TP2, TP3, MR.
  • Inputs and Outputs LSTTL Compatible OG24 Fig. 1 Pin connections (top view) ,--------TPl TP2 TI'3 MiA 0-----, I DIN (2.048MHz) I I I I I I CKL (2.048MHz)I I I I I -- Vcco--. v.
  • L - _ _ _ - - '1_-;. . ATL AW ---r------~ EPAT L - - - - - - + - - - -__-o FAT+ MIR I I OA L.

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