HYB18T512400B - 512-Mbit Double-Data-Rate-Two SDRAM

Qimonda

Datasheet Details

Part number	HYB18T512400B
Manufacturer	Qimonda
File Size	3.73 MB
Description	512-Mbit Double-Data-Rate-Two SDRAM
Datasheet	HYB18T512400B_Qimonda.pdf

latched at the cross point of differential clocks (CK rising and CK falling).

The 512-Mbit Double-Data-Rate-Two SDRAM offers the following key features:.
Off-Chip-Driver impedance adjustment (OCD) and On.
1.8 V ± 0.1 V Power Supply 1.8 V ± 0.1 V (SSTL_18) compatible I/O Die-Termination (ODT) for better signal quality.
DRAM organizations with 4 and 8 data in/outputs.
Auto-Precharge operation for read and write bursts.
Double-Data-Rate-Two architecture: two data transfers.
Auto-Refresh, Self-Refresh and power saving Powe.

📁 HYB18T512400B Similar Datasheet

HYB18T512400AC - DDR2 Registered Memory Modules (Infineon Technologies AG)
HYB18T512400AC-3.7 - 512-Mbit Double-Data-Rate-Two SDRAM (Infineon)
HYB18T512400AC-5 - 512-Mbit Double-Data-Rate-Two SDRAM (Infineon Technologies AG)
HYB18T512400AC5 - 512-Mbit Double-Data-Rate-Two SDRAM (Infineon Technologies AG)
HYB18T512400AF - 512-Mbit DDR2 SDRAM (Infineon Technologies AG)
HYB18T512400AF-3.7 - 512-Mbit Double-Data-Rate-Two SDRAM (Infineon)
HYB18T512400AF-5 - 512-Mbit Double-Data-Rate-Two SDRAM (Infineon Technologies AG)
HYB18T512160A - 512-Mbit Double-Data-Rate-Two SDRAM (Infineon Technologies AG)

Other Datasheets by Qimonda

Published: Dec 17, 2009 |