553S Datasheet - Renesas

Low Skew 1 to 4 Clock Buffer

553S Features

* Low additive phase jitter RMS: 50fs

* Extremely low skew outputs (50ps)

* Low cost clock buffer

* Packaged in 8-SOIC and small 8-DFN packages, Pb-free

* Input/Output clock frequency up to 200MHz

* Ideal for networking clocks

* Operating volta

553S General Description

The 553S is a low skew, single input to four output, clock buffer. The 553S has best in class additive phase Jitter of sub 50 fsec. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact Renesas for all of your clocking needs. F.

553S Datasheet (952.43 KB)