74FCT38075S Datasheet - Renesas

Low Skew 1 to 5 Clock Buffer

74FCT38075S Features

* Extremely low RMS Additive Phase Jitter: 50fs

* Low output skew: 50ps

* Packaged in 8-pin SOIC and 8-pin DFN

* Pb (lead) free package

* Low power CMOS technology

* Operating voltages of 1.8V to 3.3V

* Extended temperature range (-40°C to +105

74FCT38075S General Description

The 74FCT38075S is a low skew, single input to five output, clock buffer. The 74FCT38075S has best in class additive phase Jitter of sub 50 fsec. IDT makes many non-PLL and PLL based low output skew devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking need.

74FCT38075S Datasheet (282.02 KB)