82V3399 Datasheet - Renesas

Clock Generatiion

82V3399 Features

* HIGHLIGHTS

* Single chip PLL:

* Features 0.5 mHz to 560 Hz bandwidth

* Provides node clock for ITU-T G.8261/G.8262 Synchronous Ethernet (SyncE)

* Exceeds GR-253-CORE (OC-192) and ITU-T G.813 (STM-64) jitter generation requirements

* Provides node clocks for Ce

82V3399 General Description

The 82V3399 is an integrated, single-chip solution for the Synchronous Equipment Timing Source for Stratum 3, 4E, 4, SMC, EECOption1, EEC-Option2 clocks in SONET / SDH / Synchronous Ethernet equipment, DWDM and Wireless base station. The device supports several types of input clock sources: recovere.

82V3399 Datasheet (211.40 KB)

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82V3399

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211.40 KB

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Clock generatiion.
Synchronization Management WAN PLL and Clock Generatiion for IEEE-1588 82V3399 SHORT FORM DATA SHEET This short form datasheet is intended to provid.

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82V3399 Clock Generatiion Renesas

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82V3399 Features

82V3399 General Description

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