8SLVP1208
Overview
The 8SLVP1208 is a high-performance differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.
- Eight low skew, low additive jitter LVPECL output pairs
- Two selectable, differential clock input pairs
- Differential pairs can accept the following differential input levels: LVDS, LVPECL, CML
- Maximum input clock frequency: 2GHz
- LVCMOS interface levels for the control input (input select)
- Output skew: 28ps (typical)
- Propagation delay: 410ps (maximum)
- Low additive phase jitter, RMS: 54.1fs (maximum) (fREF = 156.25MHz, VPP = 1V, 12kHz-20MHz)
- Full 3.3V and 2.5V supply voltage
- Maximum device current consumption (IEE): 141mA
