9DB433 Datasheet - Renesas

FOUR OUTPUT DIFFERENTIAL BUFFER

9DB433 Features

* 3 selectable SMBus addresses; multiple devices can share the same SMBus segment

* OE# pins; suitable for Express Card applications

* PLL or bypass mode; PLL can dejitter incoming clock

* Selectable PLL bandwidth; minimizes jitter peaking in downstream PLLs

9DB433 General Description

The 9DB433 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB433 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. Typical Applications 4 output PCIe Gen1 *3 zero-dela.

9DB433 Datasheet (399.00 KB)