9FGV1005C Key Features
- 1 integer output frequency per configuration
- 2 programmable output pairs plus 1 LVCMOS REF output
- 1MHz-325MHz LVDS or LP-HCSL outputs
- 1MHz-200MHz LVCMOS outputs
- 1.8V-3.3V operation
- Individual 1.8V-3.3V VDDO for each programmable output pair
- Supports HCSL, LVDS and LVCMOS I/O standards
- Supports LVPECL and CML logic with easy AC coupling
- HCSL utilizes Renesas' LP-HCSL technology for improved
- Programmable output impedance of 85Ω or 100Ω
