9ZXL1951DNHGI8 Datasheet | Renesas

15 to 19-Output Buffers for PCIe Gen1- 5 and UPI 9ZXL15x0D/9ZXL19x0D/ 9ZXL1951D Datasheet Description The 9ZXL15x0D/9ZXL19x0D/9ZXL1951D devices prise a family of 2nd-generation enhanced performance buffers for PCIe and CPU applications. The family meets all published QPI/UPI, DB2000Q and PCIe Gen1- 5 jitter specifications. Devices are either 15 or 19 outputs. The devices function as both fanout (FOB) and zero-delay (ZDB) buffers. All devices meet DB2000Q and DB1900Z jitter and skew requirements. Key Specifications - ZDB Mode phase jitter: - PCIe Gen5 CC < 22fs RMS (Low Bandwidth) - QPI/UPI 11.4GB/s < 120fs RMS (Low Bandwidth) - IF-UPI additive jitter < 130fs RMS (Low Bandwidth) - Fanout Buffer Mode additive phase jitter: - PCIe Gen5 CC < 24fs RMS - DB2000Q additive jitter < 39fs RMS - QPI/UPI 11.4GB/s < 40fs RMS - IF-UPI additive jitter < 70fs RMS - Cycle-to-cycle jitter: < 50ps - Output-to-output skew: < 50ps Outputs - 15 or 19 Low-power HCSL (LP-HCSL) output pairs Features - LP-HCSL outputs eliminate up to 4 resistors per output pair - 9 selectable SMBus addresses - Selectable PLL bandwidths minimizes jitter peaking in cascaded PLL topologies - Hardware/SMBus control of ZDB and FOB modes allow change without power cycle - 8 OE# pins support PCIe CLKREQ# functionality (9ZXL1951) - Spread spectrum patible - 100MHz and 133.33MHz ZDB mode (9ZXL15x0, 9ZXL19x0) - 100MHz ZDB mode (9ZXL1951) - 1- 400MHz FOB mode (all devices) - -40°C to +85°C operating temperature range - Package information: see Ordering Information...