HD74AC112 flip-flop equivalent, dual jk negative edge-triggered flip-flop.
individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level.
The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clo.
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