logo

HD74ACT112 Datasheet, Renesas

HD74ACT112 Datasheet, Renesas

HD74ACT112

datasheet Download (Size : 209.33KB)

HD74ACT112 Datasheet

HD74ACT112 flip-flop equivalent, dual jk negative edge-triggered flip-flop.

HD74ACT112

datasheet Download (Size : 209.33KB)

HD74ACT112 Datasheet

Features and benefits

individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level.

Description

The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clo.

Image gallery

HD74ACT112 Page 1 HD74ACT112 Page 2 HD74ACT112 Page 3

TAGS

HD74ACT112
Dual
Negative
Edge-Triggered
Flip-Flop
Renesas

Manufacturer


Renesas (https://www.renesas.com/)

Related datasheet

HD74ACT107

HD74ACT125

HD74ACT126

HD74ACT138

HD74ACT139

HD74ACT161

HD74ACT163

HD74ACT164

HD74ACT165

HD74ACT166

HD74ACT182

HD74ACT240

HD74ACT241

Since 2006. D4U Semicon.   |   Contact Us   |   Privacy Policy   |   Purchase of parts