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HD74LS191P - Synchronous Up / Down 4-bit Binary Counter

This page provides the datasheet information for the HD74LS191P, a member of the HD74LS191 Synchronous Up / Down 4-bit Binary Counter family.

Features

  • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74LS191P DILP-16 pin PRDP0016AE-B (DP-16FV) P HD74LS191FPEL SOP-16 pin (JEITA) PRSP0016DH-B FP (FP-16DAV) Note: Please consult the sales office for the above package availability. Taping Abbreviation (Quantity).
  • EL (2,000 pcs/reel) Rev.2.00, Feb.18.2005, page 1 of 10 HD74LS191 Pin Arrangement Data B Input 1 Outputs QB 2 QA 3 Enable G 4 Inputs Down/Up 5 Outputs.

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Datasheet Details

Part number HD74LS191P
Manufacturer Renesas
File Size 263.97 KB
Description Synchronous Up / Down 4-bit Binary Counter
Datasheet download datasheet HD74LS191P Datasheet
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Full PDF Text Transcription

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HD74LS191 Synchronous Up / Down 4-bit Binary Counter (single clock line) REJ03D0453–0200 Rev.2.00 Feb.18.2005 Synchronous operation is provided by having all flip-flops clocked simultaneously so that the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters. The outputs of the four master-slave flip-flops are triggered on a low-to-high-level transition of the clock input if the enable input is high. The direction of the count is determined by the level of the down / up input. When low, the counter counts up and when high, it counts down. Level changes at the down / up input should be made only when the clock input is high.
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