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HD74LV273A - Octal D-type Flip-Flops

Description

The HD74LV273A has eight edges trigger D-type flip-flops with clear in a 20-pin package.

Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the clock input.

The clear input when low sets all outputs to a low state.

Features

  • VCC = 2.0 V to 5.5 V operation.
  • All inputs VIH (Max. ) = 5.5 V (@VCC = 0 V to 5.5 V).
  • All outputs VO (Max. ) = 5.5 V (@VCC = 0 V).
  • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C).
  • Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C).
  • Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V) Ordering Information Part Name Package Type Package Code.

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Datasheet Details

Part number HD74LV273A
Manufacturer Renesas
File Size 75.62 KB
Description Octal D-type Flip-Flops
Datasheet download datasheet HD74LV273A Datasheet
Additional preview pages of the HD74LV273A datasheet.

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Full PDF Text Transcription

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HD74LV273A Octal D-type Flip-Flops with Clear REJ03D0330–0300Z (Previous ADE-205-273A (Z)) Rev.3.00 Jun. 25, 2004 Description The HD74LV273A has eight edges trigger D-type flip-flops with clear in a 20-pin package. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the clock input. The clear input when low sets all outputs to a low state. Low-voltage and high-speed operation is suitable for batterypowered products (e.g., notebook computers), and the low-power consumption extends the battery life. Features • VCC = 2.0 V to 5.5 V operation • All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) • All outputs VO (Max.) = 5.5 V (@VCC = 0 V) • Typical VOL ground bounce < 0.8 V (@VCC = 3.
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