ICS557G-06LF, ICS557-06 Datasheet - Renesas

ICS557G-06LF 2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX

ICS557G-06LF Features

* Packaged in 20-pin TSSOP

* Pb (lead) free packaging

* Operating voltage of 3.3 V

* Low power consumption

* Input differential clock of up to 200 MHz

* Jitter 60 ps (cycle-to-cycle)

* Output-to-output skew of 50 ps

* Available in indus

Datasheet Details

ICS557G-06LF, ICS557-06

287.74 KB

2 to 4 differential pcie gen1 clock mux.

This datasheet PDF includes multiple part numbers: ICS557G-06LF, ICS557-06.
Please refer to the document for exact specifications by model.

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TAGS

ICS557G-06LF Distributor