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IDT49FCT3805B Datasheet

CMOS BUFFER/CLOCK DRIVER

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IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
BUFFER/CLOCK DRIVER
IDT49FCT3805B
FEATURES:
• 0.5 MICRON CMOS Technology
• Guaranteed low skew < 500ps (max.)
• Very low duty cycle distortion < 1.0ns (max.)
• Very low CMOS power levels
• TTL compatible inputs and outputs
• Inputs can be driven from 3.3V or 5V components
• Two independent output banks with 3-state control
• 1:5 fanout per bank
• "Heartbeat" monitor output
• VCC = 3.3V ± 0.3V
• Available in SSOP, SOIC, and QSOP packages
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The FCT3805B is a 3.3 volt, non-inverting clock driver built using
advanced dual metal CMOS technology. The device consists of two banks
of drivers, each with a 1:5 fanout and its own output enable control. The
device has a "heartbeat" monitor for diagnostics and PLL driving. The
MON output is identical to all other outputs and complies with the output
specifications in this document. The FCT3805B offers low capacitance
inputs with hysteresis.
The FCT3805B is designed for high speed clock distribution where
signal quality and skew are critical. The FCT3805B also allows single
point-to-point transmission line driving in applications such as address
distribution, where one signal must be distributed to multiple recievers with
low skew and high signal quality.
For more information on using the FCT3805B with two different input
frequencies on bank A and B, please see AN-236.
PIN CONFIGURATION
OEA
INA
INB
OEB
5
OA1 - OA5
5
OB1 - OB5
MON
VCCA
1
OA1
2
OA2
3
OA3
4
GNDA
5
OA4
6
OA5
7
GNDQ
8
OEA
9
INA
10
20
VCCB
19
OB1
18
OB2
17
OB3
16
GNDB
15
OB4
14
OB5
13
MON
12
OEB
11
INB
SOIC/ SSOP/ QSOP
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL
c 2005 Integrated Device Technology, Inc.
TEMPERATURE
1
RANGE
MAY 2010
DSC 6879/-


Renesas Electronics Components Datasheet

IDT49FCT3805B Datasheet

CMOS BUFFER/CLOCK DRIVER

No Preview Available !

IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description
Max
Unit
VTERM(2) Terminal Voltage with Respect to GND –0.5 to +4.6
V
VTERM(3) Terminal Voltage with Respect to GND
–0.5 to +7
V
VTERM(4) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG StorageTemperature
–65 to +150 °C
IOUT DC Output Current
–60 to +60 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. Input terminals.
4. Outputs and I/O terminals.
CAPACITANCE (TA = +25OC, f = 1.0MHz)
Symbol Parameter(1)
Conditions Typ. Max. Unit
CIN
Input Capacitance
VIN = 0V 4.5
6 pF
COUT
OutputCapacitance VOUT = 0V 5.5
8 pF
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names
Description
OEA, OEB
3-State Output Enable Inputs (Active LOW)
INA, INB
Clock Inputs
OAn, OBn
Clock Outputs
MON
Monitor Output
FUNCTION TABLE (1)
Inputs
OEA, OEB
INA, INB
L
L
L
H
H
L
H
H
NOTE:
1. H = HIGH
L = LOW
Z = High-Impedance
Outputs
OAn, OBn
MON
L
L
H
H
Z
L
Z
H
2


Part Number IDT49FCT3805B
Description CMOS BUFFER/CLOCK DRIVER
Maker Renesas
Total Page 3 Pages
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