M6MGB321S8TP sram equivalent, cmos sram.
DINOR (Divided bit-line NOR) architecture for the memory cell. Access Time Flash 85ns (Max.) 8M-bit SRAM is a 1,048,576 bytes / 524,288 words SRAM 85ns (Max.) asynchronou.
M6MGB/T321S8TP provides for Software Lock Release function. Usually, all memory blocks are locked and can not be programed or erased, when F-WP# is low. Using Software Lock Release function, program or erase operation 32M-bit Flash memory is a 4,194,.
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