M6MGB321S8TP Features
* DINOR (Divided bit-line NOR) architecture for the memory cell. Access Time Flash 85ns (Max.) 8M-bit SRAM is a 1,048,576 bytes / 524,288 words SRAM 85ns (Max.) asynchronous SRAM fabricated by silicon-gate CMOS technology. Supply Voltage VCC=2.7 ~ 3.0V The M6MGB/T321S8TP is a Stacked micro Multi Chip
Datasheet Details
M6MGB321S8TP, M6MGT321S8TP
92.87 KB
Cmos sram.
This datasheet PDF includes multiple part numbers: M6MGB321S8TP, M6MGT321S8TP.
Please refer to the document for exact specifications by model.
M6MGB321S8TP Distributor
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